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      Asynchronous On-Chip Networks and Fault-Tolerant Techniques

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      SKU 9781032255750 Categories ,
      This book is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks, aiming to overcome these drawbacks and ensure greater reliability of applications.

      Asynchronous On-Chip Networks and Fault-Tolerant Techniques is t...

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      Description

      Product ID:9781032255750
      Product Form:Hardback
      Country of Manufacture:GB
      Title:Asynchronous On-Chip Networks and Fault-Tolerant Techniques
      Authors:Author: Guangda Zhang, Wei Song
      Page Count:362
      Subjects:Electronics engineering, Electronics engineering, Software Engineering, Computer networking and communications, Computer architecture and logic design, Information visualization, Software Engineering, Computer networking & communications, Computer architecture & logic design, Information visualization
      Description:This book is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks, aiming to overcome these drawbacks and ensure greater reliability of applications.

      Asynchronous On-Chip Networks and Fault-Tolerant Techniques is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks, aiming to overcome these drawbacks and ensure greater reliability of applications.

      As a promising alternative to the widely used synchronous on-chip networks for multicore processors, asynchronous on-chip networks can be vulnerable to faults even if they can deliver the same performance with much lower energy and area compared with their synchronous counterparts – faults can not only corrupt data transmission but also cause a unique type of deadlock. By adopting a new redundant code along with a dynamic fault detection and recovery scheme, the authors demonstrate that asynchronous on-chip networks can be efficiently hardened to tolerate both transient and permanent faults and overcome fault-caused deadlocks.

      This book will serve as an essential guide for researchers and students studying interconnection networks, fault-tolerant computing, asynchronous system design, circuit design and on-chip networking, as well as for professionals interested in designing fault-tolerant and high-throughput asynchronous circuits.


      Imprint Name:CRC Press
      Publisher Name:Taylor & Francis Ltd
      Country of Publication:GB
      Publishing Date:2022-05-11

      Additional information

      Weight678 g
      Dimensions235 × 268 × 29 mm